Part 1 of this series explained(among other things) thebasic operating principles ofthose enhancement-modepower-FET devices known

as VFETs or VMOS. This finalepisode of the series takes a deeperlook at these devices and showspractical ways of using them.

A VMOS INTRODUCTION

A VFET can, for most practicalpurposes, be simply regarded as ahigh-power version of a conventionalenhancement-mode MOSFET. Thespecific form of VFET constructionshown in Figure 17 in Part 1 of thisseries was pioneered by Siliconix inthe mid-1970s, and the devicesusing this construction are marketedunder the trade name VMOS powerFETs (Vertically-structured Metal-Oxide Silicon power Field-EffectTransistors). This VMOS name istraditionally associated with the V-shaped groove formed in the struc-ture of the original (1976) versionsof the device.

Siliconix VMOS power FETs areprobably the best known type of

VFETs. They are available as n-chan-nel devices only, and usually incorpo-rate an integral zener diode whichgives the gate a high degree of pro-tection against accidental damage;Figure 1 shows the standard symbolused to represent such a device, andFigure 2 lists the main characteristicsof five of the most popular membersof the VMOS family; note in particu-lar the very high maximum operat-ing frequencies of these devices.

Other well-known families ofVertically-structured power MOS-FETS are those produced by Hitachi,Supertex, and Farranti, etc. Some ofthese V-type power MOSFETs areavailable in both n-channel and p-channel versions and are useful invarious high-performance comple-

mentaryaudiopoweramplifier

applications.

THE VN66AF

The best way to get to knowVMOS is to actually play with it,and the readily available SiliconixVN66AF is ideal for this purpose. Itis normally housed in a TO202-styleplastic-with-metal-tab package withthe outline and pin connectionsshown in Figure 3.

Figure 4 lists the major staticand dynamic characteristics of theVN66AF. Points to note here arethat the input (gate-to-source) signalmust not exceed the units 15Vzener rating, and that the device hasa typical dynamic input capacitanceof 50pF. This capacitance dictatesthe dynamic input impedance of theVN66AF; the static input impedanceis of the order of a millionmegohms. Figures 5 and 6 show the

VN66AFs typical output and satura-tion characteristics. Note the follow-ing specific points from thesegraphs.

(1) The device passes negligibledrain current until the gate voltagereaches a threshold value of about1V; the drain current then increasesnon-linearity as the gate is varied upto about 4V, at which point thedrain current value is about 400mA;the device has a square-law transfer

characteristic below 400mA.(2) The device has a

highly linear transfer charac-teristic above 400mA (4V onthe gate) and thus offersgood results as a low-distor-tion class-A power amplifier.

(3) The drain current iscontrolled almost entirely bythe gate voltage and isalmost independent of thedrain voltage so long as thedevice is not saturated. Apoint not shown in the dia-gram is that, for a givenvalue of gate voltage, thedrain current has a negativetemperature coefficient ofabout 0.7% per C, so thatthe drain current decreasesas temperature rises. Thischaracteristic gives a fairdegree of protection against

1 AUGUST 2000/Nuts & Volts Magazine T & L Publications, Inc. All rights reserved.

PRINCIPLES AND CIRCUITSPart 4

by Ray Marston

Ray Marston looks at practical VMOS power FET circuits in this final episode ofthis four-part series.

FET

Field-Effect Transistors

Figure 1. Symbol ofSiliconix VMOS power

FET with integral zener diode

gate protection.

Figure 2.Major

parameters offive popular

n-channelSiliconix VMOS

power FETs.

Figure 3.Outline and pin

connections of the

TO202-casedVN66AF

power FET.

Figure 5. Typical output characteristics of the VN66AF.

Figure 4. Major static and dynamic characteristics of the VN66AF.

thermal runaway.(4) When the device is saturat-

ed (switched fully on) the drain-to-source path acts as an almost pureresistance with a value controlled bythe gate voltage. The resistance istypically 2R0 when 10V is on thegate, and 10R when 2V is on thegate. The devices off resistance isin the order of megohms. These fea-tures make the device highly suitablefor use as a low-distortion high-

speed analog power switch.

DIGITAL CIRCUITS

VMOS can be used in a widevariety of digital and analog applica-tions. It is delightfully easy to use indigital switching and amplifyingapplications; Figure 7 shows thebasic connections. The load is wiredbetween the drain and the positivesupply rail, and the digital input sig-nal is fed directly to the gate termi-nal. Switch-off occurs when theinput goes below the gate thresholdvalue (typically about 1.2V). Thedrain ON current is determined bythe peak amplitude of the gate sig-nal, as shown in Figure 5, unless sat-uration occurs. In most digital appli-cations, the ON current should bechosen to ensure saturation.

The static input impedance ofVMOS is virtually infinite, so zerodrive power is needed to maintainthe VN66AF in the ON or OFF state.Drive power is, however, needed toswitch the device from one state tothe other; this power is absorbed incharging or discharging the 50pF

input capacitance of the VN66AF.The rise and fall times of the

output of the Figure 7 circuit are(assuming zero input rise and falltimes) determined by the sourceimpedance of the input signal, bythe input capacitance and forwardtransconductance of the VMOSdevice, and by the value of RL. IfRL is large compared to RS, theVN66AF gives rise and fall times ofroughly 0.11nS per ohm of RSvalue. Thus, a 100R source imped-ance gives a 11nS rise or fall time.

If RL is not large compared to RS,these times may be considerablychanged.

A point to note when drivingthe VN66AF in digital applications isthat its zener forward and reverseratings must never be exceeded.Also, because of the very high fre-quency response of VMOS, thedevice is prone to unwanted oscilla-tions if its circuitry is poorlydesigned. Gate leads should be kept

short, or be pro-tected with a fer-rite bead or asmall resistor inseries with thegate.

VMOS can beinterfaced directlyto the output of aCMOS IC, asshown in Figure8. Output riseand fall times ofabout 60nS can be expected, due tothe limited output currents availablefrom a single CMOS gate, etc. Riseand fall times can be reduced by dri-ving the VMOS from a number ofCMOS gates wired in parallel, or byusing a special high-current driver.

VMOS can be interfaced to theoutput of TTL by using a pull-upresistor on the TTL output, as shownin Figure 9. The 5V TTL output ofthis circuit is sufficient to drive600mA through a single VN66AF.Higher output cur-rents can beobtained either bywiring a level-shifter stagebetween the TTLoutput and theVMOS input, or bywiring a numberof VMOS devicesin parallel, asshown in Figure10.

When using

VMOS in digital switching applica-tions, note that if inductive drainloads such as relays, self-interruptingbells or buzzers, or moving-coilspeakers are used, clamping diodesmust be connected as shown inFigure 11, to damp inductive back-EMFs and thus protect the VMOSdevice against damage.

SOME DIGITAL DESIGNS

Figures 12 to 15 show a few

T & L Publications, Inc. All rights reserved. Nuts & Volts Magazine/AUGUST 2000 2

Figure 6.Typical

saturationcharacteristics

of theVN66AF.

Figure 7. Basic VMOS digitalswitch or amplifier.

Figure 8. Methods of drivingVMOS from CMOS.

Figure 9. Method of drivingVMOS from TTL.

Figure 10.Method of

boosting theoutput of

Figure 9 by driving threeVN66AFs in

parallel.

Figure 11. Ifinductive loadssuch as relays(a) or bells,buzzers, or

speakers (b) areused in digital

switching circuits,

protectiondiodes must be wired as

shown.

Figure 12.Water-

or touch-activated

powerswitch.

Figure 13.Delayed-turn-offpowerswitch.

Figure 14.Simple

relay-outputtimer circuit.

simple but useful digital applicationsof the VN66AF. The water- or touch-activated power switch of Figure 12could not be simpler: when thetouch contacts and water probes areopen, zero volts are on the gate ofthe VN66AF, so the device passeszero current. When a resistance(zero to 10s of megohms) is placedacross the contacts (by contact withskin resistance) or probes (by watercontact), a substantial gate voltageis developed by potential divideraction and the VN66AF passes ahigh drain current, thus activatingthe bell, buzzer, or relay.

In the manually activateddelayed-turn-off circuit of Figure 13,C1 charges rapidly via R1 whenpush-button switch PB1 is closed,and discharges slowly via R2 whenPB1 is open. The load thus activatesas soon as PB1 is closed, but doesnot deactivate until some 10s of sec-onds after PB1 is released.

In the simple relay-output timercircuit of Figure 14, the VMOSdevice is driven by the output of amanually triggered monostable orone-shot multivibrator designedaround two gates of a 4001B CMOSIC; the relay turns on as soon as PB1is closed, and then turns off auto-matically again some pre-set delaytime later. The delay is variable froma few seconds to a few minutes viaRV1.

Finally, Figure 15 shows thepractical circuit of an inexpensivebut very impressive alarm-call gener-ator that produces a dee-dahsound like that of a British police carsiren. The alarm can be turned onby closing PB1 or be feeding a highvoltage to the R1-R2 junction. Thecircuit uses an 8R0 speaker and gen-erates roughly six watts of outputpower.

DC LAMP CONTROLLERS

Figures 16 to 18 show threesimple but useful DC lamp controllercircuits that can be used to controlthe brilliance of any 12V lamp witha power rating of up to six watts. AVMOS power FET can, for many pur-poses, be regarded as a voltage con-trolled constant-current generator;thus, in Figure 16, the VMOS draincurrent (and thus the lamp bright-ness) is directly controlled by thevariable voltage of RV1s slider. Thecircuit thus functions as a manuallamp dimmer.

The Figure 17 circuit is a simplemodification of the above design,the action being such that the lampturns on slowly when the switch isclosed as C1 charges up via R3, andturns off slowly when the switch isopened as C1 discharges via R3.

The Figure 18 circuit is an effi-cient digital lamp dimmer whichcontrols the lamp brilliance withoutcausing significant power loss acrossthe VMOS device. The two 4011BCMOS gates form an astable multivi-brator with a mark/space ratio thatis fully variable from 10:1 to 1:10 viaRV1; its output is fed to the VN66AFgate, and enables the mean lampbrightness to be varied from virtuallyfully-off to fully-on. In this circuit, theVMOS device is alternately switchedfully on and fully off, so power loss-es are negligible.

LINEAR CIRCUITS

VMOS power FETs can, whensuitably biased, easily be used ineither the common source or com-mon drain (voltage follower) linearmodes. The voltage gain in the com-mon source mode is equal to theproduct of RL and the devices gM orforward transconductance. In thecase of the VN66AF, this gives avoltage gainof 0.25 perohm of RLvalue, i.e., again of x4with a 16Rload, or x25with a 100Rload. The volt-age gain inthe commondrain mode isslightly lessthan unity.

A VMOS powerFET can be biasedinto the linear com-mon source modeby using the stan-dard enhancement-mode MOSFET bias-ing techniqueshown in Figure 19,in which the R1-R2potential divider is

wired in the drain-to-gate negativefeedback loop and sets the quiescentdrain voltage at roughly half-supplyvalue, so that maximal signal levelswings can be accommodated beforeclipping occurs.

When in the Figure 19 circuit R3 has a value of zero ohms, thecircuit exhibits an input impedancethat, because of the AC negativefeedback effects, is roughly equal tothe parallel values of R1 and R2 divid-ed by the circuits voltage gain (RL xgM. If R3 has a finite value, the inputimpedance is slightly less than the R3value, unless AC feedback-decouplingcapacitor C2 is fitted in place, inwhich case, the input impedance isslightly greater than the R3 value.

Figure 20 shows how to bias theVN66AF for common drain (voltagefollower) operation. Potential dividerR1-R2 sets the VMOS gate at a quies-cent value slightly greater than half-supply voltage. When the R3 value iszero, the circuit input impedance isequal to the parallel values of R1 andR2. When the R3 value is finite, theinput impedance equals the R3 valueplus the parallel R1-R2 values. Theinput impedance can be raised to avalue many times greater than R3 byadding the C2 bootstrap capacitorto the circuit.

Finally, Figure 21 shows a practi-cal example of a VMOS linear appli-cation. The circuit is wired as a class-A power amplifier which, because ofthe excellent linearity of the VN66AF,gives remarkably little distortion forso simple a design. The VN66AFmust be mounted on a goodheatsink in this application. Whenthe design is used with a purelyresistive 8R0 load, the amplifierbandwidth extends up to 10MHz. NV

3 AUGUST 2000/Nuts & Volts Magazine T & L Publications, Inc. All rights reserved.

Figure15.

Warble-tone six

wattalarm.

Figure 16. Simple DC lamp dimmer.

Figure 17. Soft-start lamp switch.

Figure 18.High-

efficiency DC lampdimmer.

Figure 19. Biasingtechnique for

linear commonsource operation.

Figure 21.Simple class-Aaudio power

amplifier gives1% THD at 1W.

Figure 20.Biasing

techniques forlinear commondrain (voltage

follower) operation.

FFEETT